This invention relates to a semiconductor device and a method of manufacturing the same, more particularly a semiconductor device wherein at least a portion of the lower surface and the side surfaces of semiconductor islands formed on the principal surface of a silicon semiconductor substrate are surrounded with porous silicon oxide, and a method of manufacturing such semiconductor device.
An IPOS (insulation by oxidized porous silicon) method of isolating semiconductor devices, and more particularly, isolation of elements of a semiconductor integrated circuit by using a porous silicon oxide (insulation by porous silicon oxide) has become widely used in the art because this method has the following advantageous features: (a) as the density of the porous silicon is only about 50% of that of monocrystalline silicon, the change in the volume caused by oxidation is small, and (b) as the speed of oxidation is extremely fast, porous silicon can be oxidized to a thickness of larger than 10 microns under a condition in which the monocrystalline silicon is oxidized to a thickness of only 1.0 micron. Accordingly, it is possible to form a relatively thick oxide film on the silicon substrate in a perfectly embedded state, thereby improving the element isolating capability. This technique provides a method for efficiently and readily fabricating integrated circuits at high density that are capable of operating at high speeds. A typical example of a semiconductor device whose elements are isolated by using the porous silicon oxide film is disclosed in U.S. Pat. No. 3,919,060 dated Nov. 11, 1975. The semiconductor device disclosed therein is prepared by epitaxially growing a N type silicon layer on a P type monocrystalline silicon substrate and then surrounding the N type silicon layer with a P type silicon region which is connected to the silicon substrate. Thereafter, the P type silicon region and the silicon substrate contiguous thereto are rendered porous by an anodizing technique. Then, the N type island region is surrounded by a heat oxidized silicon region by heat oxidizing the porous silicon region for insulating and isolating the N type island region from the other portions and the N type silicon region is converted into a channel thus obtaining a MIS type field effect transistor of the P channel type.
In the transistor of such construction, the P type silicon region is the source and drain region is in contact with the N type silicon region through a PN junction at only the side surfaces on their confronting inner sides so that the junction capacitance is small with the result that the transistor can operate at a high speed with a small energy consumption.
In such MIS type field effect transistor, however, since the channel region is constituted by the N type silicon region, the transistor is of the P channel type so that it is impossible to obtain an N channel type transistor capable of operating at a higher speed. More particularly, in the P channel type, the charge transmitting medium comprises holes whose speed is about one half of that of electrons comprising the charge transmitting medium for the N channel type. For this reason, in order to increase the operating speed, an N channel type transistor is more advantageous.
When one tries to prepare an N channel type transistor with the well known method described above, it is necessary to convert the N type island region into a P type. To this end, it is necessary to diffuse a group III impurity such as boron into the N type island region. According to this approach, however, it is necessary to make the quantity of the P type impurity to be diffused into the N type island region larger than that of the N type impurity with the result that the mobility of the carriers (electrons) in this region decreases and the resulting transistor does not have excellent characteristics. Furthermore, with this construction, in as much as the N type silicon island region is formed by an epitaxial growth method, the manufacturing cost of the element increases.